Question 1 : In 8086, when the carry is generated from D3 bit (of D7-D0) ,flag set condition is shown with which flag?
- Auxiliary carry
- Carry flag
- Overflow flag
- Trap flag
Question 2 : In 8255, Bidirectional I/O mode is applicable for which port?
- Port A
- Port B
- Port C
- Port B lower
Question 3 : What will be the starting and ending offset address (or range) if the size of the segment is 64 KB?
- 0000H to 7FFFH
- 0000H to FFFFH
- 8000H to FFFFH
- 00000H to FFFFFH
Question 4 : Which is the 8086 instruction that copies content of flag register on to the stack?
- PUSH
- POP
- PUSHF
- POPF
Question 5 : What will be the 8-bit command to mask IR6, IR7 and unmask all other interrupts of 8259 using OCW1?
- A0H
- C0H
- D0H
- 0CH
Question 6 : Select the correct difference between compare and subtract instruction of 8086
- Compare instruction stores the result of comparison
- Compare instruction shows result using flags and doesn’t store result
- Subtraction doesn’t store result
- Subtraction shows result using flags and doesn’t store result
Question 7 : Which unit provides a four level protection mechanism for system code and data against application program in 80386?
- Paging Unit
- Segmentation Unit
- Execution Unit
- Central Processing Unit
Question 8 : When an interrupt occurs, it breaks the execution of current instruction and diverts its execution to one of the following?
- Interrupt service routine
- Counter word register
- Execution unit
- control unit
Question 9 : What is used to implement the multiple branch prediction in Pentium processor?
- control unit
- bus interface unit
- branch instruction register
- branch target buffer
Question 10 : Which is the address decoding technique where all remaining address lines are used to generate the Chip select signal?
- Partial
- Absolute
- Block
- non linear
Question 11 : Which is the main feature provided by Pentium?
- superscalar architecture
- Multithreading architecture
- Multioperational architecture
- superscalar and super pipelined architecture
Question 12 : Which addressing mode is being used in the 8086 given instruction? MOV [BX],DL
- Direct Addressing Mode
- Register Indirect Addressing Mode
- Register Addressing Mode
- Immediate Addressing Mode
Question 13 : In Pentium, the percentage of hits to the total cache access is given by?
- Hit Ratio
- Accuracy
- Efficiency
- Precision
Question 14 : Which instruction makes the 8086 processor check the TEST* pin (* indicates active low signal)?
- WAIT
- ESC
- LOCK
- HLT
Question 15 : Which offset address register is used to generate 20 bit physical address for Code Segment in 8086?
- Stack Pointer Register
- Base Pointer Register
- Source Index Register
- Instruction Pointer Register
Question 16 : The size of Segment address, offset address & physical address are ________ bits each in 8086 microprocessor.
- 8,8 & 16
- 8,16 & 20
- 16,16 & 20
- 8,8 & 8
Question 17 : Which instruction among the following unconditionally transfers the control of execution to the provided address?
- CALL
- IRET
- JNC
- JMP
Question 18 : In 8253 PIT device, the counter starts counting only if ?
- GATE signal is low
- GATE signal is high
- CLK signal is low
- CLK signal is high
Question 19 : How many bits logical address is supported by 80386 DX microprocessor?
- 32
- 20
- 64
- 48
Question 20 : Which register of 8259 PIC stores all interrupt level that are requesting for interrupt service?
- IMR
- ISR
- Control Register
- IRR
Question 21 : In 8257 (DMA), each of the four channels has?
- a pair of two 8-bit registers
- a pair of two 16-bit registers
- one 16-bit register
- one 8-bit register
Question 22 : Which mode does 8086 microprocessor operate in if MN/MX is low?
- Minimum Mode
- Maximum mode
- Control Mode
- Execute Mode
Question 23 : What is the contents of the register after execution of following: MOV AL, E9H NEG AL
- 16
- 15
- 17
- 26
Question 24 : What is the memory data bus width in Pentium?
- 16 bit
- 32 bit
- 64 bit
- 48 bit
Question 25 : Which type of descriptor table from the following is supported by 80386 DX ?
- TDS
- ADT
- GDT
- MDS
Question 26 : ICW1 of single 8259 which is edge triggered will be?
- 0BH
- 13H
- 11H
- 40H
Question 27 : Which is a not part of Bus Interface Unit
- Instruction Queue
- Segment Registers
- Address conversion mechanism
- ALU
Question 28 : On the execution of CMPSB contents of which segment compared with contents of which segment?
- CS & DS
- DS & ES
- DS & DS
- ES & ES
Question 29 : If any interrupt request given to an input pin cannot be disabled by any means then the input pin is called as?
- Maskable interrupt
- Non-maskable interrupt
- Maskable interrupt and Non-maskable interrupt
- Interrupt Request
Question 30 : Segment currently being accessed by 8086 is indicated by which status register?
- s3 & s4
- s0 & s1
- s5 & s6
- s1 & s2